Hi George,
Yes, per the description I referred to in the datasheet, it is what is referred to as a hybrid D/A converter. But without any part of it being delta sigma, however. As defined in this Wikipedia writeup, it uses a segmented architecture, combining "thermometer coding" for the most significant 6 bits, and R2R architecture for the other 14 bits. So as I indicated, the structure as a whole can be considered to be a multibit ladder, but not an R2R ladder.
Regarding your question, I have no particular quantitative feel for how that all may trade off performance-wise against other approaches providing similar resolution and speed. Maximum speed, btw, looks like it is not much faster than redbook, as the digital data is described as being clocked into a 24 bit register serially at 35 MHz max (indicated as 50 MHz max in one place, perhaps incorrectly).
Regards,
-- Al
Yes, per the description I referred to in the datasheet, it is what is referred to as a hybrid D/A converter. But without any part of it being delta sigma, however. As defined in this Wikipedia writeup, it uses a segmented architecture, combining "thermometer coding" for the most significant 6 bits, and R2R architecture for the other 14 bits. So as I indicated, the structure as a whole can be considered to be a multibit ladder, but not an R2R ladder.
Regarding your question, I have no particular quantitative feel for how that all may trade off performance-wise against other approaches providing similar resolution and speed. Maximum speed, btw, looks like it is not much faster than redbook, as the digital data is described as being clocked into a 24 bit register serially at 35 MHz max (indicated as 50 MHz max in one place, perhaps incorrectly).
Regards,
-- Al