Schiit Yggdrasil -- 21 bit?

"Two twenty bit DACs (one per phase) double the resolution for a balanced signal. Double the resolution only adds 6db (one more bit) for a total of 21 bits. In this case, 20+20 equal 21."

Actually, the first sentence isn’t correct. Or at least it is somewhat misleading, depending on what comparison is being implied by the use of the words "for a balanced signal."

As Shadorne correctly indicated earlier, simply using one DAC chip to create one phase (i.e., polarity) of the analog signal and another DAC chip to create the opposite polarity will not increase the resolution beyond what is provided by each of the chips. While it will double the full scale (maximum) output voltage compared to single-ended operation of one DAC chip, it will also double the voltage corresponding to the least significant of the 20 bits. So the number of discrete steps (i.e., possible values) within that doubled voltage range will still be 2^20 (two raised to the 20th power), meaning that resolution will still be 20 bits.

As I described earlier, though, if one DAC chip is used to handle the positive half of the output voltage that is ultimately generated, and the other DAC chip is used to handle the negative half, the resolution would indeed become 21 bits.

Regards,
-- Al

Shadorne’s technical points and the statements in the video he linked to all make sense to me, at least theoretically, as does the response by Mmeysarosh.

FWIW, though, I took a close look at Figures 6 and 7 in JA’s measurements of the Yggdrasil, which show the responses to undithered 16 bit and 24 bit signals at very low levels of 90.31 db below full scale. The bottom line is that the response to 24 bits looks vastly better than the response to 16 bits, and looks quite good aside from glitches occurring at the zero-crossings. And for that matter a comparison of the 24 bit response shown in Figure 7 with the corresponding Figure 12 for the comparably priced Mytek Brooklyn DAC (and its 32 bit converter!) shows the Yggy looking at least as good and probably better, aside from the zero-crossing glitches. Even though JA described that output of the Mytek as being "a well-formed sinewave," and its overall measured performance as being "superb."

And regarding the zero-crossing glitches, those likely reflect what we’ve previously presumed to be the switchover between the two DAC chips that are used on each channel, that would occur at the zero-crossing, and they would therefore be unrelated to truncation error or rounding error. And given that the glitches are more than 100 db below full scale and are very short in duration they would seem likely to be audibly insignificant.

FWIW. Regards,
-- Al

Hi Shadorne,

I'm not sure that what I said in my previous post came across clearly.  It amounts to the same thing the OP said, which you've agreed provides 21 bits of resolution, but described and perhaps implemented in a different manner.

What I described is not "balanced where both chips are operating simultaneously and are always on."  And it does in fact double the "number of unique digital values available."

Please re-read my previous post and see if you don't agree.

Best regards,
-- Al
 

I don’t think you’re missing anything, defiantboomerang.

Shadorne, if we denote the magnitude of the maximum possible output voltage as V, I’m envisioning that one DAC chip is controlling generation of output voltages between 0 and +V, with the other DAC chip generating 0 when a positive voltage is called for, while the other DAC is controlling generation of output voltages between 0 and -V, with the first DAC generating 0 when a negative voltage is called for. The outputs of the two DACs are then combined to create the overall output of the component. The voltage generated by each DAC would of course be quantized with 20 bit resolution, which would result in 21 bit resolution over the range from +V to -V.

Best regards,
-- Al

How can the DAC be 21 bit if the chips are 20 bit?

The two DAC chips on each channel are described as being used in a balanced configuration. So I would suspect that one chip handles one half of the eventual output voltage range and the other chip handles the other half. Which would mean that 20 bits of resolution is provided for each half of the output voltage range, which in turn would correspond to 21 bits of resolution relative to the entire range.

That would be the theory, at least. How well it works out in practice will depend on the overall design, of course.

Regards,
-- Al