Will computer to DAC replace transports and cdp's?

Steve, does your device also provide the master clock for the I2S bus?

Thanks!
Alex

Alex - you bet. I can configure it for 128fs or 256fs.

Steve N.

Steve the aseemblage 3.1 platinum DAC uses the Burr Brown 1704-K chips

Steve, I see, this explains it. However, please be aware that as good as it looks, there are problems transmitting separated Data and Clocks via single cable, especially in the case master clock is included.

The only "problem" with S/PDIF is the master clock recovery which is done from the Bitclock by multiplying it and PLL-ing it. This of course results in high jitter in the master clock. But since 44.1 (or multiples) sampling is of primary use with your application, you can easily use one of the latest Crystal or AKM S/PDIF receivers and configure it in Master Mode with own master clock generator. In this case the master clock is on-board with the DIR and DAC and if precision external XO or TCXO is used you can have as low as 5-10pS (RMS) jitter. This will be free of the problems with the I2S cable.

I've found the above solution superior to direct I2S transmission. I think you should try it too, especially if you’re planning to introduce your own designed DAC box.

Regards,
Alex

The Burr Brown 1704-K chip uses left-Justified data which can be supported by the Off-Ramp I2S with some mods, however, the timing is unclear on how the data is multiplexed between the left and right channel chips. This could be a problem.

Steve N.